論文 - 寺内 衛
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『イノベーションのジレンマ』における「技術開発のSカーブ」という視点の限界について －“技術”の詳細を理解していない者による“技術経営論”に対する技術者からのコメント－
寺内 衛，寺内かえで
14 ( 1 ) 1 - 12 2024年3月
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担当区分：筆頭著者, 責任著者
C. M. Christensenが用いた「技術開発のSカーブ」という視点は，彼の著書『イノベーションのジレンマ』の根幹である．この「技術開発のSカーブ」がなぜ「S 字」になるのか？を考察し，Christensenには“見えなかった”ものを題材に「技術の詳細を理解しない視点の限界」を議論した．次に，既存技術を敢えて捨てることによってメーカーとして成功を収めた事例を例示し，最後に，持続的イノベーションがなされ得なくなった場合であっても，ひとたび現代社会のインフラ実現に不可欠となった技術は（経営者や投資家にとっては魅力の無いものになっていたとしても）最低限そのままで，可能であれば“その実現に係るコストをより低下させられ得る方法で”継承されていかざるを得ないことを指摘した．
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人体の基本的な機能に関するリテラシーについて：大学1回生へのアンケート結果 ―日本人は，なぜ屋外でもマスクをし続けているのか―
寺内 衛・寺内かえで
13 53 - 68 2023年3月
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担当区分：筆頭著者, 責任著者
日本におけるCOVID-19（SARS-CoV-2 感染症）第8 波が未だに収束していない2023 年1 月20 日，首相がSARS-CoV-2 感染症の感染症法の位置付けの変更の検討を厚生労働大臣らに指示した1が，果たして日本国民は感染症についての基礎的な知識をどの程度有しているのだろうか？2023 年に入り，（病院の休診日翌日に相当する日を除いて2）日々300 名以上のSARS-CoV-2 感染症による死亡者が発表され続けている3時点で，高等学校までに学んだはずの「感染症」や「人体の免疫機構」に関する知識を実際にどのくらい正しく認識しているのか？について，COVID-19 パンデミック開始後に大学に入学した1 年次生へ経時的に調査した結果に関して報告する．
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“コミュニケートされる情報”という視点から見た「芸術」について
寺内 衛・寺内かえで
13 35 - 51 2023年3月
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担当区分：筆頭著者, 責任著者
『芸術とは，創造者（発信者）によって受容者宛てになされた情報の発信様式であり，芸術表現・芸術作品とは，創造者と受容者とで共有される情報である』と定義し，芸術表現・芸術作品に用いられる“記録媒体”（表現媒体）の発明・進化と，その芸術表現・芸術作品の受容者並びにその芸術表現・芸術作品に係る『コスト負担者』を考えることによって，古代ギリシャ以降現代に至るまでの芸術並びに芸術作品の変遷が，洋の東西を問わず，合理的になされてきていることが理解される．
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「SIRS感染症モデル」から考える日本のCOVID-19対応について
寺内 衛・寺内かえで
13 1 - 17 2023年3月
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担当区分：筆頭著者, 責任著者
日本における2022 年のSARS-CoV-2 感染症による累積死亡者数は速報値で39,000 名を超え，2023 年1 月15 日現在で1 週間当たり2,900 名を超えていて未だにピークは見えていない（新規感染確認者数2の増加も同様である）．これは1 年間が52 週であることを考えれば，2023 年の間に10 万人以上の人命がSARS-CoV-2 感染症で失われる可能性があることを意味しているが，そのようなことは全く報道されていない．ワクチン接種の効果が時間の経過と共に減弱することが明らかになっているにも拘わらず追加接種率が低迷するなかで迎えた3 年ぶりの「行動制限の無い年末年始」がもたらすであろうものを2023年1月末時点で予測する．
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寺内 衛・寺内かえで
12 1 - 19 2022年3月
担当区分：筆頭著者, 責任著者
SARS-CoV-2感染症によるCOVID-19パンデミックは，それ以前の現代社会におけるさまざまな“歪み”を図らずもあぶり出した．そのような“歪み”のなかで特筆すべきものが極度の「専門家依存」であり，我々市民の多くが「自ら考え行動する」ことを放棄してしまい，パンデミック宣言後2年を経過しても混乱は続いている．人類が有する『知識』を体系的に融合してそれに基づく行動を一人ひとりが行なえるようにならない限り，「専門家依存」は解消されない。現状は，『知識』に関してフランス革命以前の封建制度に戻ってしまったことを意味している。今こそ「百科全書派」が目指した「知の共有」が必要とされている．
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今，知らなければならないこと ―SARS-CoV-2 感染症（COVID-19 パンデミック）についての基礎知識―
寺内 衛, 寺内かえで
Hirao School of Management Review 11 101 - 122 2021年3月
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担当区分：筆頭著者, 責任著者 出版者・発行元：甲南大学マネジメント創造学部
2019年末に中国・武漢で確認されたSARS-CoV-2感染症によるパンデミック（COVID-19パンデミック）は，2021年1月現在，世界中で累計罹患者数並びに累計死者数ともに増加の一途をたどっている．日本では人口比で他国と比較すると罹患者数及び死者数は少ない方ではあるものの「科学的知見並びに科学的方法に基づかない“対策”」の結果として新規感染者数の制御が不能となり，11都府県に対して2回目の緊急事態宣言が発出されるに至っている．「科学的知見並びに科学的方法」に基づく「感染症対策の基本」に立ち戻ることこそがCOVID-19パンデミックを収束させる唯一の方法である．
DOI： 10.14990/00003802
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Preferences for STEM Subjects and Daily Life Habits among University Freshmen in Japan 査読あり 国際誌
K.Terauchi, G.Mizugaki, M.Terauchi, S.Yoshida
Proceedings of 2016 AAAS (American Association of the Advancement in Science) Annual Meeting 2016年2月
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出版者・発行元：American Association of the Advancement in Science
In the 2012 Programme for International Student Assessment (PISA), Japanese students ranked fourth, showcasing strong math and science skills among OECD countries. However, in 2015, only 151,000 out of 617,500 freshmen in Japan's universities chose to major in STEM fields. A survey revealed that only 20% of Japanese adults expressed a strong interest in scientific discoveries, compared to over 33% in the US and UK. This raises questions about why only a quarter of Japanese students pursue STEM subjects and when they lose interest in these areas. To investigate, researchers distributed a questionnaire to over 1,700 freshmen from various universities, including national women’s universities and private institutions. Using k-means clustering, they categorized students based on their daily habits and analyzed their preferences in subjects throughout their education. The study identified nine clusters based on students' sociability and interests in nature or machinery. Notably, two clusters represented students who chose non-STEM majors and disliked math and science, while four clusters included those who pursued STEM majors without disliking these subjects. A significant finding was that the recognition of math and science as weak subjects increased dramatically as students transitioned to high school, even among STEM majors. This suggests potential barriers in Japan's math and science curricula, particularly during the junior high to high school transition, prompting the authors to explore these barriers and seek effective solutions.
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日本において消費されるエネルギー資源についての一考察 査読あり
寺内 衛，寺内かえで
エネルギー環境教育研究 10 ( 1 ) 45 - 54 2016年1月
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担当区分：筆頭著者, 責任著者
現在の日本は、エネルギー資源の9割以上を海外からの輸入に依存している。そして、電力によって実現される豊かで便利な日常生活を支えるために、国内に供給されるエネルギー資源総量の２割以上を、“発電”というエネルギー資源形態転換時の“損失”として費やしている。この状況は、2011年の東日本大震災及びそれに伴って発生した福島第一原子力発電所の事故以降も本質的には変わっておらず、損失割合はむしろ増加した。2013年度における人口１人当たりのエネルギー資源供給量は、1880年比で36倍超になる。1990年度と比較すると、2013年度はエネルギー資源消費量はほとんど変わらない一方、エネルギー資源供給量が6 %以上増大したが、これは、エネルギー変換効率の低い、旧式の火力発電所の再稼働に伴う転換損失量の増大と呼応する。また、2013年度の産業部門でのエネルギー消費量は1990年度比で8 %以上減少したが、民生部門並びに運輸部門におけるエネルギー消費量がそれぞれ15 %以上並びに6 %以上増加した。このことは、民生部門においては情報通信機器の普及に伴う電力使用量の増大、運輸部門では旅客用自家用車によるエネルギー消費量の増大にそれぞれ対応しており、後者は、乗用車の保有台数が2013年度は1990年度比で1.71倍となっていることからも裏付けられる。
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寺内 衛，寺内かえで
Hirao School of Management Review 5 17 - 24 2015年3月
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担当区分：筆頭著者
日本語において，日常的には明示的な定義をせずにほとんど同義語のように用いられている「技術(technology)」及び「科学(science)」という概念は，本来明確に区別して使用されるべきものである．但し，それぞれの最先端は“science-based technology”/“technology-based science”であり，今日では相互不可分の関係にある．しかしながら，最先端の ICT (information communication technology) においても「失敗に学ぶという技術の本質」は少しも変わっておらず，このことこそが「根本的な技術リテラシー」として「情報リテラシー」と共に万人に理解されるべきものである．
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寺内 衛，寺内かえで
Hirao School of Management Review 5 37 - 42 2015年3月
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担当区分：筆頭著者, 責任著者
水素は，地球上には単体としてはほとんど存在しておらず，生産するために他のエネルギー資源から得たエネルギーが不可欠な物質である。加えて，沸点が 20 K（氷点下253℃）と極めて低く，かつ，常温では液化できないため，ガソリンや灯油などの常温で液体であるような化石燃料（炭化水素）と比較して，運搬や貯蔵に関しても，より多くのエネルギーが必要とされる．このような水素の基礎的な特性は，“水素エネルギー社会”を考える際には必ず考慮されなければならない．
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"教養としての科学 －Newton 力学/古典電磁気学/量子力学と「技術」との関連について－"
寺内 衛，寺内かえで
Hirao School of Management Review 5 25 - 36 2015年3月
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担当区分：筆頭著者, 責任著者
「科学」と「技術」の関係の変遷を，17 世紀末の Newton による古典力学－19 世紀後半の Maxwell による電磁気学の体系化－20 世紀の量子力学の誕生，という自然のありようについての知見の拡がりに関する主要な転換点毎に考察し，「科学」は常にその時代毎の「技術」に依拠して拓かれ，新たな“知見”が「技術」を資するようになるまでには有限の時間が必ず必要とされる，という結論を得た．また，“定量予測可能性”を Newton 力学以降の“近代科学”を特徴付ける性質として提案すると共に，『“身の丈を超える科学”を担う“コスト”』という視点の重要性についても指摘する．
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日本のエネルギー資源自給率 －「再生可能エネルギー」の学習前に学ぶべき基礎知識－ 査読あり
寺内 衛、寺内かえで
大学の物理教育 20 ( 1 ) 27 - 30 2014年3月
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担当区分：筆頭著者
日本における資源別エネルギー供給量並びに部門別最終エネルギー消費量の推移の数値データを利用した講義を2013年度後期に実際に行なってみたところ、現在の大学生が有している「エネルギー」に関する常識が、第一次石油ショックを児童期の実体験として経験している筆者とは全く異なるものであることを強く認識させられる結果となった。大学生の「エネルギー」に関する常識は初等中等教育課程における「エネルギー教育」の内容によるところが多いと考えられるが、この状況の一端を報告し、その対応のために筆者が考案した「大部分のエネルギー資源を日本は海外に依存しているという事実を説明するための資料」とそれを用いた講義を受講した大学生の反応を紹介する。
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「再生エネルギー」の学習に活かしたい数量的データについて 査読あり
寺内 衛、寺内かえで
大学の物理教育 19 ( 3 ) 96 - 100 2013年11月
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担当区分：筆頭著者
本稿では、日本がこれまでにどのくらいの量のエネルギーをどのような手段によって得てきたか、また、それらエネルギーがどのような部門でどのくらい使用されてきたのか、を、（財）日本エネルギー経済研究所が公表している『EDMC／エネルギー・経済統計要覧（2013年版）』に基づいて数量的に示す。次いで、太陽光・太陽熱・風力・地熱など、現在我々が「再生可能エネルギー」と考えているものから原理的にどのくらいのエネルギーを取り出すことができるのか、に関して、自然科学的知見に基づく推定を示す。
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今、知らなければならないこと－被曝の被害と防護をめぐる“科学リテラシー”について－ 査読あり
寺内 衛、寺内かえで
政経研究 ( 98 ) 78 - 92 2012年6月
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担当区分：筆頭著者, 責任著者
2011年3月11日の東日本大震災は、我々の現在の日常生活が、これまで人類が獲得してきた科学・技術の蓄積に如何に依拠しているか、さらに、それらの科学・技術を我々が如何に“認識していなかったか”を明らかにした。そして、福島第一原発の事故は、我々の一人一人に、これまで看過してきた科学的・技術的な判断を否応なく迫っている。
本論文では、最低限の“科学リテラシー”であると筆者が考えるいくつかの項目を“科学的な知見”に基づいて記述する。特に、“放射能に対する防護基準が、どのような知見に基づいてどのように決定されているか”／“放射能の生体影響について何がわかっていないのか”を説明する。 -
“科学”“リテラシー”に関する一考察 査読あり
寺内 衛、寺内かえで
政経研究 ( 93 ) 71 - 78 2009年11月
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担当区分：筆頭著者
“科学”・“リテラシー”という語は、日本においては、西欧における語義とはやや異なった意味を伝達する際に用いられている。これらの語の定義をその語源 から再検討し、そのそれぞれが本来表わす概念により適した日本語表現を提案する。“学ぶということ”の本質を問い、“教養”の重要性を指摘する。
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“専門前”教育の重要さ―初等中等教育の充実こそ急務― 査読あり
寺内かえで、寺内 衛
科学教育研究 32 ( 3 ) 236 - 237 2008年9月
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4名の日本人研究者に対して2008年度ノーベル物理学賞・化学賞が授与されたことから基礎科学研究が注目されたが、4博士全員が“ゆとり教育”カリキュラム以前の“文理の分け隔てのない初等中等教育”を受けて育った、という事実は看過してはならず、“専門偏重”の風潮を一日も早く改めることがまさに焦眉の急であること、を指摘した。
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米国のＩＴ覇権 査読あり
寺内 衛
政経研究 ( 78 ) 89 - 99 2002年5月
単著
担当区分：筆頭著者
米国によるIT覇権を、暗号関連技術輸出規制とMicrosoft社のOS戦略という二つの具体的視点から考察してみると、米国連邦政府による、ネットワーク社会という「新大陸」征服に向けた強力な方向付けの存在が浮き彫りになる。今、我々がすべきことは、米国によってde facto standard化されたITの強制的な利用に翻弄されることではなく、なぜ米国がIT覇権を実現できたのか？を真摯に学ぶことである。
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Linux Communityの変容可能性―public domainモデルに基づくTCADツールベンダのビジネスモデルを例に― 査読あり
寺内 衛
政経研究 ( 76 ) 67 - 78 2001年3月
単著
担当区分：筆頭著者
Open Source Softwareという、旧来の資本による“情報囲い込み”戦略とは全く異なった立場の象徴的存在であるLinux Communityにおいても、Microsoftなどの“新独占資本”が行なってきたものと全く同一のビジネスモデルによる“世界制覇”が着々と進んでいる。 ネットワーク社会における“一般的・科学的労働”に主体的に携われるか、あるいは“変容した肉体労働”にのみ従事するかの分岐は、個々人の“自立的な成長”にかかっている。
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ＰＣバブル－Intel / Microsoftの市場戦略 査読あり
寺内 衛
政経研究 ( 74 ) 71 - 80 2000年3月
単著
担当区分：筆頭著者
今日、米国の情報関連産業の隆盛の象徴と見なされているインテル(Intel)社及びマイクロソフト（Microsoft）社のこれまでの製品戦略には、「徹底した下位互換性の維持＋α」の実現、という明らかに共通する手法が見いだされる。加えて、１）普及させ、２）独占を図り、３）自らの得意分野での競争に持ち込む、という戦略も共通である。両社とも最終製品に関するコンセプト提案を通じてエンドユーザの囲い込みを積極的に行なってきた。対照的に、“自らの製品が用いられる最終製品の明確なコンセプトをエンドユーザに提示できない”日本の半導体業界は長期的不振に喘いでいる。但し、Intel / Microsoftの現状は、ユーザメリットの希薄なコンセプト提案が目立ち始めており、PCバブル崩壊の日は近いかも知れない。
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ソフトウエアによるDRAM支配－DRAM価格トレンドに関する一考察－ 査読あり
寺内 衛
政経研究 ( 73 ) 73 - 80 1999年11月
単著
担当区分：筆頭著者
ダイナミックランダムアクセスメモリ（DRAM）の需給は、パーソナルコンピュータ（ＰＣ）に搭載されるDRAMの個数で決定される。３２ビットＰＣの普及に伴い、ＰＣの主記憶容量は、アプリケーション／ＯＳといったソフトウエアによって決定されるようになった。近年では、Microsoft社製Windows系列の変化に合わせてＰＣの主記憶容量は着実に増大（３年で２倍）したが、過去のトレンドに盲従したDRAM高集積化のスピード（３年で４倍）の方が早かったため、大幅な価格下落を招いた。今後、DRAMメーカーがエンドユーザに対してDRAMの新たな使用方法をこれまで以上にわかりやすく提示できない限り、DRAM使用量の増加をソフトウエアメーカーに依存し続ける体質は変わらず、DRAM事業収益性の自立的な向上は望めないであろう。
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A Test Circuit for Evaluating Characteristics Mismatch in Metal-Oxide- Semiconductor Field- Effect Transistor Pairs by Estimating Conductance Variation through Voltage Measurement 査読あり
Mamoru Terauchi, Kazuo Terada
Japanese Journal of Applied Physics 47 4480 - 4486 2008年6月
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担当区分：筆頭著者, 責任著者
A procedure is described for evaluating characteristics mismatch in a pair of metal–oxide–semiconductor field-effect transistors (MOSFETs), which are nominally designed to be identical. This procedure is based on conductance variation estimation through voltage measurement. By measuring the gate voltage dependence of the voltage of the middle point of a MOSFET pair connected in series, various pieces of information on difference in characteristics (e.g., channel width difference and threshold voltage difference) in the MOSFET pair can be extracted. The applicability of the proposed procedure to fabrication process monitoring is also described and the principle of a suitable test circuit structure is illustrated.
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Impact of Substrate Bias on Fixed-Pattern- Noise in Active Pixel Sensor Cells 査読あり
Mamoru Terauchi
Japanese Journal of Applied Physics 46 7303 - 7305 2007年11月
単著
担当区分：筆頭著者
The study investigated the impact of substrate (body) bias on fixed pattern noise (FPN) in Active Pixel Sensors (APS). By measuring a test device that serially connects two metal-oxide-semiconductor field-effect transistors (MOSFETs) placed within the same well region, it was revealed that the finite substrate bias, which is inevitable in conventional APS cell circuits using traditional methods, degrades the characteristic fluctuations of the source follower amplifier included in the APS cell. This results in FPN that cannot be improved by conventional correction methods such as correlated double sampling. Furthermore, it was shown that the current-voltage characteristics of the logarithmic conversion circuit, achieved by connecting the gate and drain of the MOSFET, are also affected by the substrate bias, leading to increased characteristic variations compared to when the substrate bias is zero.
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Feasibility Study of a Novel Four Transistor Silicon-on-Insulator Static Random Access Memory Cell Utilizing Partial Trench Isolation 査読あり
Mamoru Terauchi
Japanese Journal of Applied Physics 46 5136 - 5138 2007年8月
単著
担当区分：筆頭著者
0.5 V動作を志向し、薄膜SOI(Silicon-On- Insulator)基板上に作成した四つの薄膜SOI金属酸化物半導体電界効果トランジスタ(MOSFET)からなる新規スタティックランダムアクセスメモリ(SRAM)を提案する。本研究に係る新規SRAMにおいては、対向接続されたトランジスタ対のボディ領域が負荷抵抗として利用される。各SRAMセルをワード線に接続しているトランスファーMOSFETはダイナミックスレッショルドMOSFET(DTMOS)である。部分トレンチ分離法を用いることにより、本研究に係るSRAMセルにおいては、ボディコンタクトを実現するための特殊なゲート電極形状が廃されている。回路解析機能を有するデバイスシミュレータを利用することによって、本研究において提案されたSRAMセルが0.5 Vという低電圧で正常に動作することが明らかになった。
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Impact of Forward Substrate Bias on Threshold Voltage Fluctuation in Metal- Oxide-Semiconductor Field-Effect Transistors 査読あり
Mamoru Terauchi
Japanese Journal of Applied Physics 46 4105 - 4107 2007年7月
単著
担当区分：筆頭著者
The impact of forward body (substrate) bias voltage on the threshold voltage (Vth) of metal-oxide-semiconductor field-effect transistors (MOSFETs) and its dependence on device parameters (such as gate length, substrate impurity concentration, and gate oxide thickness) were investigated using a charge-sharing model. It was shown that applying a forward body bias voltage of 0.5 V can suppress Vth fluctuations by up to 20% in devices with a gate length of 100 nm or less, and reduce the sensitivity of Vth to device parameters. Additionally, experimental results demonstrating the Vth fluctuation suppression effect due to forward body bias voltage were presented.
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A Wide-Dynamic Range Photodiode-Type Active Pixel Sensor Cell with Seamlessly Combined Logarithmic-Linear- Logarithmic Response 査読あり
Atsushi Hamasaki, Mamoru Terauchi, Kenju Horii
Japanese Journal of Applied Physics 46 4051 - 4054 2007年7月
共著
A photodiode (PD) type active pixel sensor (APS) cell with a continuous log-linear-log response over a wide dynamic range is proposed for the first time, and its operation is confirmed through circuit simulation. The proposed APS cell has two additional MOSFETs connected in parallel to the reset MOSFET (metal-oxide-semiconductor field-effect transistor) compared to the conventional 3-transistor (3Tr) type PD APS cell. By utilizing the previously proposed operating method, it is shown that the newly proposed 5Tr type PD APS cell exhibits a continuous log-linear-log response.
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Temperature Dependence of the Subthreshold Characteristics of Dynamic Threshold Metal-Oxide- Semiconductor Field-Effect Transistors and Its Application to an Absolute-Temperature Sensing Scheme for Low-Voltage Operation 査読あり
Mamoru Terauchi
Japanese Journal of Applied Physics 46 4102 - 4104 2007年7月
単著
担当区分：筆頭著者
A method for detecting absolute temperature based on the temperature dependence of the voltage-current characteristics of dynamic threshold metal-oxide-semiconductor field-effect transistors (DTMOS) in the subthreshold region is proposed. This proposed method does not require voltages greater than 0.5 V or initial calibration. While this method is well-suited for SOI (Silicon-On-Insulator) circuits based on SOI technology using SOI substrates, it can also be easily applied to conventional bulk MOS devices. Experimental results of absolute temperature measurement using bulk MOS devices are also presented.
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連続的に切り替わる線形－対数応答特性を有するフォトダイオード型4-Trアクティブピクセルセンサセル 査読あり
浜崎 淳、寺内 衛、堀居賢樹
映像情報メディア学会誌 60 ( 7 ) 1111 - 1113 2006年7月
共著
連続的に切り替わる線形－対数応答特性を有するフォトダイオード型4-Trアクティブピクセルセンサセルの提案とシミュレーションによる性能予測。適切に選択したバイアス電圧でリセットトランジスタを弱反転状態にバイアスすることにより、線型応答→対数応答へ自動的に特性を変化させられることを見いだした。
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A Novel Operation Scheme for Realizing Combined Linear- Logarithmic Response in Photodiode-Type Active Pixel Sensor Cells 査読あり
Atsushi Hamasaki, Mamoru Terauchi, Kenju Horii
Japanese Journal of Applied Physics 45 3326 - 3329 2006年4月
共著
We propose a photodiode (PD) type active pixel sensor (APS) cell with a continuous linear-logarithmic response. In a 3-transistor (3Tr) type PD APS cell, by appropriately selecting the bias voltage to operate the reset transistor in the weak inversion region, we have shown through simulation that the conventional 3Tr PD APS cell exhibits a continuous linear-logarithmic response. We also discuss methods to expand the dynamic range in the linear response region of conventional APS cells
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A Novel Operation Scheme for Realizing Combined Linear- Logarithmic Response in Photodiode- Type Active Pixel Sensor Cells 査読あり
Atsushi Hamasaki, Mamoru Terauchi, Kenju Horii
Extended Abstracts of the 2005 International Conference on Solid-State Devices and Materials 666 - 667 2005年9月
共著
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Selectable Logarithmic/Linear Response Active Pixel Sensor Cell with Reduced Fixed-Pattern- Noise Based on Dynamic Threshold MOS Operation 査読あり
Mamoru Terauchi, Atsushi Hamasaki, Arinori Suketa
Japanese Journal of Applied Physics 44 2347 - 2350 2005年4月
共著
担当区分：筆頭著者
A new active pixel sensor (APS) cell is proposed that has lower fixed pattern noise (FPN) compared to conventional devices and can select between linear and logarithmic responses. This APS cell consists of four dynamic threshold metal-oxide-semiconductor field-effect transistors (DTMOS). DTMOS inherently has smaller characteristic fluctuations compared to conventional MOSFETs, which can be explained by the charge-sharing model. Therefore, the proposed APS cell exhibits lower FPN in the logarithmic response region compared to conventional logarithmic response APS cells, even without an external noise reduction circuit. The FPN reduction achieved by the proposed APS cell was confirmed by measuring a test circuit that mimics the readout circuit of a real device.
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A Selectable Logarithmic / Linear Response Active Pixel Sensor Cell with Reduced Fixed-Pattern- Noise Based on DTMOS Operation 査読あり
Mamoru Terauchi, Atsushi Hamasaki, Arinori Suketa
Extended Abstracts of the 2004 International Conference on Solid-State Devices and Materials 504 - 505 2004年9月
共著
担当区分：筆頭著者
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SOI SRAM / DRAM Cells for 0.5 V Operation 査読あり
Mamoru Terauchi
Japanese Journal of Applied Physics 43 2160 - 2165 2004年4月
単著
担当区分：筆頭著者
Described are a 4-transistor static random access memory (4T SRAM) and a dynamic random access memory (DRAM) gain cell, both created using SOI (Silicon-On-Insulator) substrates and capable of low-voltage operation. Both cells actively utilize the body regions of partially depleted SOI metal-oxide-semiconductor field-effect transistors (MOSFETs). In the 4T SRAM cell, the body region of an SOI MOSFET with an H-shaped gate electrode is used as the load resistor for the proposed SRAM cell's inverter pair, and its resistance value can be controlled independently of the MOSFET's threshold voltage. Simulation results demonstrated the stable operation of the proposed 4T SRAM at a power supply voltage of 0.5 V. The SOI DRAM gain cell consists of a p-channel junction field-effect transistor (JFET) and an n-channel MOSFET, with the MOSFET's source diffusion layer also serving as the JFET's gate diffusion layer. The signal charge is stored in the gate junction capacitance of this JFET, modulating its source-drain conductance. Simulation results confirmed that the proposed SOI DRAM gain cell operates normally at a power supply voltage of 0.5 V.
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A Novel Photodiode- Type Active Pixel Sensor Utilizing DTMOS with Reduced Fixed-Pattern Noise 査読あり
Mamoru Terauchi
Technical Digest of 2003 IEEE International SOI Conference 57 - 58 2003年10月
単著
担当区分：筆頭著者
A novel active pixel sensor with reduced fixed-pattern-noise is proposed and its effectiveness is experimentally verified. Smaller characteristics fluctuation in threshold voltage and drain conductance of DTMOS than that of bulk counterpart considerably reduces fixed-pattern-noise of the proposed photodiode-type APS.
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SOI SRAM / DRAM Cells for 0.5 Volt Operation 査読あり
Mamoru Terauchi
Extended Abstracts of the 2003 International Conference on Solid-State Devices and Materials 620 - 621 2003年9月
単著
担当区分：筆頭著者
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A 'Self-Body- Biased' SOI MOSFET: A Novel Body-Voltage- Controlled SOI MOSFET for Low Voltage Applications 査読あり
Mamoru Terauchi, Shichio Funakoshi
Japanese Journal of Applied Physics 42 2014 - 2019 2003年4月
共著
担当区分：筆頭著者
A new body potential control scheme for SOI (Silicon-On-Insulator) metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed, and its characteristics are investigated through simulation. In the "on" state, the body potential is electrically isolated from the external body terminal by the gate depletion layer and is automatically controlled by the drain voltage and drain current. This new structure is predicted by simulation to achieve over 30% increase in current drive capability compared to an equivalent MOSFET using a bulk substrate. Mixed-mode simulation revealed that a CMOS inverter composed of the proposed device has a shorter propagation delay compared to a bulk CMOS inverter. Furthermore, simulation showed that the proposed device does not exhibit the history effect on propagation delay that is characteristic of conventional partially depleted SOI devices. This is because, in the "off" state, the proposed device is equivalent to a conventional body-tied partially depleted SOI device, allowing excess majority carriers, the main cause of the history effect, to be swept out from the body terminal each time the device turns off.
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A Logic-Process- Compatible SOI DRAM Gain Cell Operating at 0.5 Volt 査読あり
Mamoru Terauchi
Technical Digest of 2002 IEEE International SOI Conference 86 - 87 2002年10月
単著
担当区分：筆頭著者
A novel SOI DRAM gain cell operating at 0.5 V is proposed. It consists of a p-channel JFET and an n-channel MOSFET, whose source diffusion functions as gate diffusion of the JFET as well. Signal charge is stored in the gate diffusion capacitance of the JFET, leading to the modulation in its source-drain conductance. Mixed-mode simulation with the use of a device simulator reveals that the proposed SOI DRAM gain cell is able to operate properly under supply voltage as low as 0.5 V.
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'History Effect'- Free Operation of 'SBB' SOI MOSFETs 査読あり
Mamoru Terauchi, Shichio Funakoshi
Extended Abstract of 2002 International Conference on Solid-State Devices and Materials 596 - 597 2002年9月
共著
担当区分：筆頭著者
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Threshold Voltage Fluctuation Analysis in Dynamic Threshold MOSFET Based on Charge-Sharing 査読あり
Mamoru Terauchi
Technical Digest of 2001 IEEE International SOI Conference 53 - 54 2001年10月
単著
担当区分：筆頭著者
Threshold voltage (V/sub th/) fluctuation in Dynamic Threshold MOSFET (DTMOS) is analyzed based on a charge-sharing model. It has been revealed that the gate depiction layer width in DTMOS devices is smaller than that in body-tied partially-depleted SOI MOSFETs (PDSOI) or bulk MOSFET in normal conditions, leading to smaller V/sub th/ fluctuation in DTMOS (/spl sigma//sub Vth//sup DT/) due to impurity number fluctuation in the gate depiction layer. Vth sensitivity on both impurity concentration (N/sub a/) and gate oxide thickness (T/sub ox/) is also reduced in DTMOS.
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A Novel 4T SRAM Cell Utilizing 'Self-Body- Biased' SOI MOSFET Structure Operating at 0.5 Volt 査読あり
Mamoru Terauchi
Technical Digest of 2000 IEEE International SOI Conference 108 - 109 2000年10月
単著
担当区分：筆頭著者
A novel 4T SRAM cell utilizing the 'self-body-biased' ('SBB') SOI MOSFET structure (Terauchi and Terada, Proc. IEEE Int. SOI Conf., p. 36, 1999) is proposed. The body region of an SOI MOSFET with an 'H-shaped' gate electrode is used as a resistor in the inverter pair of the SRAM cell. The resistance of the body region is controlled by the low impurity concentration region beneath the auxiliary gate electrode and its geometry, independently from the threshold voltage of the MOSFET. Device simulation reveals the stable operation of the proposed SRAM cell under supply voltage of as low as 0.5 V.
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Design Guideline and Performance Prediction of 'SBB' SOI MOSFETs 査読あり
Shichio Funakoshi, Mamoru Terauchi
Technical Digest of 2000 IEEE International SOI Conference 52 - 53 2000年10月
共著
Characteristics of 'self-body-biased' ('SBB') SOI MOSFETs (Terauchi and Terada, 1999) have been studied in detail. Static simulations show that both the desired off-state leakage current (I/sub off/) and the on-state current (I/sub on/) ratio (I/sub on//I/sub off/) can be achieved by independently changing the impurity concentration of the 'high Na' and the 'low Na' regions of 'SBB' SOI MOSFETs. Transient simulations reveal that an inverter made of 'SBB' CMOS devices has up to 30% shorter propagation delay (/spl tau//sub pd/) at a supply voltage of 0.9 V than that for a bulk CMOS inverter under a relatively heavy load condition (load capacitance of 1 pF).
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'Self-Body- Biased' SOI MOSFET through 'Depletion Isolation Effect' 査読あり
Mamoru Terauchi, Kazuo Terada
Technical Digest of 1999 International SOI Conference 36 - 37 1999年10月
共著
担当区分：筆頭著者, 責任著者
A new SOI MOSFET structure utilizing a novel body potential control scheme is proposed. In its 'on' state, its body potential is electrically isolated from the external body terminal by the gate depletion layer, and is controlled automatically through the drain current and drain voltage. More than 30% improvement in current drivability is predicted.
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The Effect of Ion Implantation on the Gate Oxide Integrity of SOI Wafers 査読あり
Terauchi, Samata, Kubota, Yoshimi
Technical Digest of 1998 International SOI Conference 125 - 126 1998年10月
共著
担当区分：筆頭著者
The effect of ion implantation on the gate oxide integrity (GOI) of SOI wafers has been investigated. It has been found that the GOI of SOI wafers is significantly affected by ion implantation to the SOI layer before gate oxidation. SOI wafers are found to be more sensitive to metal contamination than bulk wafers because the buried oxide (BOX) layer functions as a diffusion barrier for metal contamination. The effect of the SOI-BOX interface on the gettering of metal contamination is also discussed.
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Evaluation of 0.3 micron Poly-Silicon CMOS Circuits for Intelligent Power IC Application 査読あり
Tomoko Matsudai, Mamoru Terauchi, Makoto Yoshimi, Norio Yasuhara, Yukihiro Ushiku, Akio Nakagawa
Japanese Journal of Applied Physics 37 1103 - 1106 1998年4月
共著
In this paper, we report on the fine device performance of a 0.3 μm gate length polysilicon complementary metal-oxide-semiconductor (CMOS). The breakdown voltage of 0.3 μm n-channel metal-oxide-semiconductor field effect transistor (NMOSFET) devices exceeds 6 V, which is higher than that of NMOSFET devices on separation by implanted oxygen (SIMOX) wafer. The drain current of a 10 μm channel width device is 540 μA, which is one-fifth of that of NMOSFET on SIMOX. The leakage current is less than 10-11 AJ/μm, when the gate voltage is below O V. The S-factor is 125 mV/dec, and the threshold voltage is 0.4 V. Therefore the ON/OFF current ratio is greater than 10^7 . A delay time of 1 ns is achieved in polysilicon NAND rings. Hence, it is ascertained that the polysilicon CMOS is applicable for the fabrication of control and protection circuits on
power devices. -
'Depletion Isolation Effect' of Surrounding Gate Transistors 査読あり
Mamoru Terauchi, Akihiro Nitayama, Naoyuki Shigyo, Fumio Horiguchi
IEEE Transactions on Electron Devices 44 2303 - 2305 1997年12月
共著
担当区分：筆頭著者
0.5 micron以下の大きさを有する取り巻きゲート型金属酸化物半導体電界効果トランジスタ(SGT)を作成し、その電圧電流特性を研究した。シリコン柱が完全には空乏化していないSGT(例えば、0.6 micron SGT)においても、シリコン柱の下部拡散層をドレインとして用い、充分に高い電圧を印加することによって、完全空乏型SOI(Silicon-On-Insulator)デバイスに特有の理想的な電圧電流特性(例えば、室温で60 mV/dec.に迫る程の理想的なサブスレッショルド係数、基板バイアス電圧に依存しない閾値電圧など)が観測された(空乏分離効果)。
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Advantage of SOI Technology in Low Voltage ULSIs 査読あり
M. Yoshimi, S. Kawanaka, T. Yamada, M. Terauchi, T. Shino, T. Fuse, Y. Oowaki, S. Watanabe
SPIE Microelectronic Device Technology 3212 178 - 187 1997年10月
共著
Low power advantage of SOI (silicon-on-insulator) technology is presented. A 0.5 V operation ALU is demonstrated by employing a gate-to-body connected structure. From the viewpoint of reliability in process integration, origin of a leakage current between source and drain is investigated in detail. The performance advantage of fabricated SOI ALUs over bulk devices as well as issues to be overcome are discussed.
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An Ultra Low Voltage SOI CMOS Pass-Gate Logic 査読あり
Fuse, Oowaki, Terauchi, Watanabe, Yoshimi, Oouchi, Matsunaga
IEICE Transactions on Electronics E80-C 472 - 477 1997年10月
共著
An ultra low voltage CMOS pass-gate logic using body-bias controlled SOI MOSFETs has been developed. The logic is composed of gate-body connected SOI pass-gates and a CMOS buffer with the body-bias controlled by the complementary double-rail input. The full-adder using the proposed logic improved the lowest operation voltage by 27%, compared with the SOI CPL (Complementary Pass-Gate Logic). For a 16 16 bit multiplier, the power-delay product achieved 70 pJ (including 50 pF I/O) at 0.5 V power supply, which was more than 1 order of magnitude improvement over the bulk CPL.
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Evaluation of 0.3 micron Poly-Silicon CMOS Circuits for Intelligent Power IC Application 査読あり
Tomoko Matsudai, Mamoru Terauchi, Makoto Yoshimi, Norio Yasuhara, Yukihiro Ushiku, Akio Nakagawa
Extended Abstracts of the 1997 International Conference on Solid-State Devices and Materials 378 - 379 1997年9月
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Yoshimi, Terauchi, Nishiyama, Arisumi, Matsuzawa, Shigyo, Takeno, Tomita, Suzuki, Ushiku, Tango
IEEE Transactions on Electron Devices 44 423 - 430 1997年3月
共著
SOI MOSFETにおける基板浮遊効果を抑制するバンドギャップエンジニアリングの提唱とSiGeソース/ドレイン構造による実証。
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A 0.5V 200Mhz 1-stage 32b ALU using a body bias controlled SOI Pass-Gate Logic 査読あり
Fuse, Oowaki, Yamada, Kamoshida, Oota, Shino, Kawanaka, Terauchi, Yoshida, Matsubara, et al.
Technical Digest of 1997 IEEE International Solid-State Circuits Conference 286 - 287 1997年2月
共著
SOI CMOS with gate-body connection (DTMOS) and body bias controlled SOI pass-gate logic (BCSOI pass-gate) take advantage of individually isolated SOI device active area and reduce threshold voltage by controlling each device body bias. Hence, they enjoy higher speed than circuits based on fixed low threshold voltage. The direct body bias control used in previous work suffers from leakage current at supply voltage higher than 0.8V due to drain-body junction leakage. A practical circuit technology that offers the highest speed, lowest operation voltage and stable operation under wide supply voltage demonstrates performance with an ALU macro using this technology.
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The Impact of the Floating-Body Effect Suppression on SOI Integrated Circuits 査読あり
Mamoru Terauchi, Akira Nishiyama, Tomohisa Mizuno, Makoto Yoshimi, Shigeyoshi Watanabe
Technical Digest of 1996 IEEE International Electron Devices Meeting 855 - 858 1996年12月
共著
担当区分：筆頭著者
The bandgap engineering technique suppresses not only anomalies in the DC transfer characteristics of SOI CMOS circuits but also characteristics fluctuations of SOI MOSFETs. It is experimentally verified that the floating-body effects in 8 k SOI MOSFETs in 0.7 mm/sup 2/ wafer area cannot be controlled completely with a conventional fabrication technique. Thus it is concluded that the suppression of the floating body effects is essential to fabricate actual LSIs utilizing SOI devices.
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Analysis of Floating-Body-Induced Leakage Current in 0.15 micron SOI DRAM 査読あり
Mamoru Terauchi, Makoto Yoshimi
Technical Digest of 1996 IEEE International SOI Conference 138 - 139 1996年10月
共著
担当区分：筆頭著者
Summary form only given. Degradation of the dynamic retention time in SOI DRAMs is a critical issue in the application of SOI technology to memory devices. One possible degradation mode related with the floating-body effect occurs in a non-selected memory cell storing "1" due to a transient lowering of the threshold voltage (Vth) of the transistor associated with a voltage drop of a data line from a precharge level to 0 V. It was reported that this dynamism can induce a leakage current as high as several mA at low voltage regions. In this paper, the possibility of this degradation mode in a 0.15 /spl mu/m SOI DRAM cell is analyzed in detail considering various device parameters and the design guideline to avoid the degradation is described.
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Reduction of the Floating-Body Effect in SOI-MOSFETs by the Bandgap Engineering Method 査読あり
Yoshimi, NIshiyama, Arisumi, Terauchi, Matsuzawa, Shigyo
Proceedings of 7th International Symposium on Silicon-On-Insulator Technology and Devices 231 - 236 1996年10月
共著
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Advantages of Low Voltage Applications and Issues to be Solved in SOI Technology 査読あり
Yoshimi, Terauchi, Nishiyama, Numano, Kubota, Watanabe, Tango
Technical Digest of 1996 IEEE International SOI Conference 4 - 5 1996年10月
共著
With low voltage applications as the main objective, SOI technology has made rapid and substantial progress in recent years. This paper describes the current status of SOI technology with emphasis on analysis of dynamic retention characteristics in low voltage DRAMs, countermeasures regarding the floating-body effect in low voltage region, and reliability issues in state-of-the-art SOI substrate technology.
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Analysis of Si-Ge Source Structure in 0.15 micron SOI MOSFETs Using Two Dimensional Device Simulation 査読あり
Arisumi, Matsuzawa, Shigyo, Terauchi, Nishiyama, Yoshimi
Japanese Journal of Applied Physics 35 992 - 995 1996年4月
共著
We describe the technological potential of the bandgap engineering technique involving a Si-Ge source structure in a fully-depleted SOI MOSFET to suppress the'floating-body effect. The Si-Ge layer fabricated in the source region acts as an absorber for excess holes in the channel region. The detailed .mechanism as well as the structure dependence in SOI MOSFETs with a gate length of 0.15 μm have been studied using a two-dimensional device simulation. It has been found that the imprpvement in BVds is strongly dependent on the lateral position of the Si-Ge layer relative to the source-to-channel pn junction. It is further predicted that encroachment of the Si-Ge layer into the channel region achieves the maximum BVds improvement. The BVds improvement is predicted to reach 1.5 V if it proves possible to lower the energy barrier at the pn junction in the case where tlEg = 0.2 eV.
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Formation of SiGe Source/Drain Using Ge Implantation for Floating-Body Effect Resistant SOI MOSFETs 査読あり
Nishiyama, Arisumi, Terauchi, Takeno, Suzuki, Takakuwa, Yoshimi
Japanese Journal of Applied Physics 35 954 - 959 1996年4月
共著
SiGe was formed by Ge implantation into silicon on insulator (SOI) substrates with the dosage range from 0.5 to 3 X 1016 cm-2 and subsequent annealing in N2 . The implantation dosage dependence of the crystalline quality, bandgap and sheet resistance of the SiGe layers are investigated. The implantation damage for Ge dosage up to 1 X 1016 cm-2 can be removed at a temperature as low as 700°C. A SiGe crystalline network is formed by the annealing at the same time. With a Ge dosage of 1 x 1016 cm-2 or more, bandgap narrowing of the SiGe layer was detected. Sheet resistances of SiGe N+ and p+ layers gradually increase for higher Ge dosage. SOI MOSFET characteristics in terms of the floating-body effect with the SiGe source/drain layers are presented. The bandgap narrowing suppresses the floating-body effect of fully depleted SOI MOSFETs, while maintaining the reverse leakage current of the p-n junction between the source/drain and channel at a low level.
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0.5V SOI CMOS Pass-Gate Logic 査読あり
Fuse, Oowaki, Terauchi, Watanabe, Yoshimi, Oouchi, Matsunaga
Digest of Technical Papers, 1996 IEEE International Solid-State Circuits Conference 88 - 89 1996年2月
共著
Demand for low-power ULSIs for mobile electronic equipment is increasing rapidly. To reduce power consumption, lower operating voltage and minimized device size (or count) is essential. To lower the actual threshold voltage and lower the operation voltage, SOI MOSFET with gate-body connection is proposed. However, the circuit architecture that affords the maximum advantage of the body controlled SOI MOSFET has not yet been reported. The SOI CMOS pass-gate logic described here offers the lowest operation voltage and reduced transistor dimensions. In this logic the body of the SOI pass-gate is connected to the input signal given to the gate. Low threshold voltage for the onstate pass-gate and high threshold voltage for the off-state passgate is realized, and the increase in the threshold voltage due to the body-effect is suppressed. Two types of buffer suitable for SOI pass-gate logic are examined.
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Bandgap Engineering Technology for Suppressing the Floating-Body-Effect in 0.15 mm SOI-MOSFET 査読あり
Yoshimi, Nishiyama, Terauchi, Arisumi, Murakoshi, Ushiku, Takeno, Suzuki
Technical Digest of 1995 IEEE International SOI Conference 80 - 81 1995年10月
共著
The substrate floating effect is the most fundamental problem in SOI-MOSFETs. Conventional countermeasures, such as body-contact, LDD structure are accompanied by area penalty, Id degradation and other drawbacks. To suppress this effect, we have proposed the bandgap engineering method, in which a narrow bandgap material is formed in the source region. In this paper, an ideal structure for the bandgap engineering is discussed and actually achievable performance is estimated based on simulations and experiments for 0.15 /spl mu/m SOI-MOSFETs.
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Formation of SiGe Source/Drain Using Ge Implantation for Floating-Body Effect Resistant SOI MOSFETs 査読あり
Nishiyama, Arisumi, Terauchi, Yoshimi, Takeno, Suzuki
Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials 545 - 547 1995年9月
共著
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Analysis of Si-Ge Source Structure in 0.15 micron SOI MOSFETs Using Two-Dimensional Device Simulation 査読あり
Arisumi, Matsuzawa, Shigyo, Terauchi, Nishiyama, Yoshimi
Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials 860 - 862 1995年9月
共著
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Suppression of the Floating-Body Effects in SOI MOSFETs by Bandgap Engineering 査読あり
Mamoru Terauchi, Makoto Yoshimi, Atsushi Murakoshi, Yukihiro Ushiku
Digest of Technical Papers, 1995 Symposium on VLSI Technology 35 - 36 1995年6月
共著
担当区分：筆頭著者
The floating-body effects, which are regarded as the most critical issues in applying Silicon-On-Insulator (SOI) devices to actual LSIs, can be suppressed by the reduction in bandgap energy in the source region. In addition to an increase in the drain breakdown voltage, the suppression of both kinks in I/sub d/-V/sub d/ characteristics and threshold voltage shift with an increase in drain voltage are achieved in sub-quarter micron Nch thin-film SOI MOSFETs.
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Technology Trends of Silicon-On-Insulator -Its Advantages and Problems to be Solved- 査読あり
Yoshimi, Terauchi, Murakoshi, Koh, Matsuzawa, Shigyo, Ushiku
Digest of Technical Papers, 1994 IEEE Electron Devices Meeting 429 - 432 1994年12月
共著
Recent progress in SOI technology is reviewed and problems which need be solved are discussed. Emphasis is placed on the substrate floating effect, for which the bandgap engineering method is proposed for the first time. It is demonstrated that Si-Ge formation in the source region can improve the drain breakdown voltage significantly.
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A Surrounding Gate Transistor (SGT) Gain Cell for Ultra High Density DRAMs 査読あり
Mamoru Terauchi, Akihiro Nitayama, Fumio Horiguchi, Fujio Masuoka
Digest of Technical Papers, 1993 Symposium on VLSI Technology 21 - 22 1993年6月
共著
担当区分：筆頭著者
Conventionally, it is necessary to obtain enough (eg. 30fF per one cell) storage capacitance in as small a area as possible. In order to realize high density DRAMs, this leads to the employment of very deep trench- or complicated stacked-capacitors, which elongates fabrication processes. On the other hand, read-out voltage in a conventional DRAM cell is so small that the folded bit-line (BL) scheme must be utilized. In order to reduce noise voltage due to the so-called array-noise, the minimum cell size in this scheme is 8F^2 (F: feature size), which Is larger than that (6F^2) in the open BL scheme. Both the elongated fabrication processes and the 1arge cell size may augment the fabrication cost to be an intolerable amount as F is going to be scaled down to lower sub-micron dimension.
In order to overcome these cost-related problems, the authors propose an easy-to-make, and extremely small, new gain cell structure based on Surrounding Gate Transistor (SGT) [1-3]. Since it operates as a gain cell, it ls possible to read out sufficient amount of signal charge regardless of the stored amount. Thus the storage capacitance needed to realize enough retention time can be much smaller than that required for the conventional trench/stacked DRAM cells. Therefore the open BL scheme can be used for this SGT gain cell because there ls no noise-related problem. In addition, Its cell size is reduced to be 4F.- since It can be arranged to have the cross-point-type configuration. It ls much smaller than other gain cells such as SEA cell [4] or CG cell [5]. Therefore this gain cell ls a promising candidate cell structure for 1G bit/4G bit DRAMs. -
Primary Processes in Sensory Rhodopsin and Retinochrome 査読あり
Kobayashi, Ohtani, Tsuda, Ogasawara, Koshihara, Ichimura, Hara, Terauchi
Plenum Photobiological Science: Its Application 561 - 570 1991年4月
共著
hotochemistry of two chromoproteins with retinal have been studied. One is a photoreceptor for the phototaxis of Halobacterium halobium and the other is a photosensitive pigment contained in cephalopod visual cells. The behaviors of the intermediates in their photocycles were clarified with picosecond and nanosecond timeresolved absorption spectroscopy apparatuses.
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Femtosecond Spectroscopy of Acidified Bacteriorhodopsin 査読あり
Takayoshi Kobayashi, Mamoru Terauchi, Masayuki Yoshizawa, Makoto Taiji, Tsutomu Kouyama
Proceedings of 1990 International Quantum Electronics Conference 182 - 182 1990年6月
共著
Bacteriorhodopsin (bR) is a ligh t-harvesting energy-transducing pigment so far found only in Halobacterium halobium, prokaryotes that occur in natural brines where the NaCl concentration is at or near saturation.1 Its chromophore, retinal (vitamin A aldehyde), is bound via protonated Schiff base linkage to the E group of a lysine-216 residue in the 26,000-mol wt. protein.2 At neutral pH, bR exhibits a purple color and becomes blue in the acidic environment.1
Because the acidic form of bR (bR605) is an ~40:60 mixture of 13-cis bR605 and all-trans bR605 and neither 13-cis bR605 nor all-trans bR605 can be isolated from each other, there are few papers concerning the photocycles of bR605 including our early picosecond experiment.3
The primary photoprocesses of bR605 studied for the first time, we believe, by femtosecond absorption spectroscopy are described. It has been found that the lowest excited singlet states of 13-cis and all-trans bR605 have different lifetimes (1.5 ± 0.2 ps for 13-cis bR605 and 8.6 ± 0.9 ps for all-trans bR605) from each other and that the red shifted ground state intermediate so far reported in the nanosecond time scale Kacid is directly formed from the lowest excited singlet states of bR605; i.e., there is no species that corresponds to J625, which is the first red shifted ground state intermediate in the photocycle of light adapted bacteriorhodopsin at neutral pH (bR568) in the photocycle of bR605. It has also been found that, because there was no clear oscillatory behavior in the transient gain or absorption associated with the transition from the lowest excited singlet states of bR605, the isomerization around C13=C14 of the retinal molecule in the lowest excited singlet states in both 13-cis bR605 and all-trans bR605 has an overdamped nature; i.e., the isomerization angle varies only monotonously in the lowest excited singlet states of both 13-cis bR605 and all-trans bR605. -
Femtosecond Spectroscopy of Acidified and Neutral Bacteriorhodopsin 査読あり
Takayoshi Kobayashi, Mamoru Terauchi, Tsutomu Kouyama, Masayuki Yoshizawa, Makoto Taiji
SPIE Laser Applications in Life Science 1403 407 - 416 1990年5月
共著
Femtosecond time-resolved spectroscopic measurements were performed over a wide spectral range of 450-900 nm for the acidic state (bR605) and neutral state (bR568) of bacteriorhodopsin, and their initial photoprocesses were compared. In the neutral state, the induced emission at 860 nm and the excited-state absorption at 480 nm decayed simultaneously with a time constant of 500 fs. This result supports the previous report that the transient absorption species at 460 nm corresponds to the S1 state of bR568. In the acidic state, the decay of induced emission at 860 nm and excited-state absorption at 480 nm were described by two time constants of 1.5 ± 0.2 ps and 8.6 ± 0.9 ps. These two components are estimated to be due to two isomers present in the acidic state. In the acidic state, no time-dependent vibrational structure was observed in the induced emission or excited-state absorption. From these experimental results, it is evident that the isomerization around the C13-C14 bond of the retinal molecule in the S1 state can be described by overdamped vibration. In other words, in the S1 state, the isomerization angle changes monotonically.
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Primary Photoprocesses in Bacteriorhodopsin and Octopus Rhodopsin by Time-Resolved Spectroscopy
Mamoru Terauchi
博士論文 1990年3月
単著
高度好塩菌halobacterium halobiumの光感受性タンパクであるバクテリオロドプシンの酸性状態(bR605)及び中性状態(bR568)におけるフェムト秒時間分解分光測定を、450-900 nmに亘る広いスペクトル範囲で行ない、その光初期過程を比較した。中性状態に関しては、過渡吸収種がbR568のS1状態に対応するという結果が得られた。酸性状態に関しては、酸性状態で存在する二つのアイソマーによるものと推定される二成分に対応する過渡応答が観測された。さらに、S1状態におけるレチナール分子の炭素骨格C13-C14回りの異性化角が時間と共に単調に変化することが明らかになった。
また、タコロドプシンのナノ秒時間分解分光を行ない、その光初期過程逆反応の温度依存性を調べることによって、どの反応過程におけるロドプシンのconformation変化が最大なのかを突き止めるための研究を行なった。 -
Picosecond Absorption Spectra of a Reaction Center from a Novel Thermophilic Photosynthetic Bacterium 'Chromatium tepidum' 査読あり
Nozawa, Terauchi, Kobayashi, Hatano
Springer Series in Chemical Physics 48 606 - 609 1988年10月
共著
Picosecond transient absorption spectroscopy has been applied to a new reaction center purified from a novel thermophilic photosynthetic bacterium Chromatium tepidum. Although the ground state spectrum of the reaction center shows significant differences from that of a mesophilic purple bacterium (Rhodobacter sphaeroides R-26), the primary charge separation kinetics in the reaction center of C. tepidum were essentially the same as those of R. sphaeroides R-26. The significant differences in the ground state spectra are reflected in the profile of the transient absorption spectra. Futhermore electronic transition assignments were discussed.
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Nosaka, Miyama, Terauchi, Kobayashi
Journal of Physical Chemistry 92 255 - 256 1988年10月
共著
Study of semiconductor particles is attractive because of possible applications for the direct conversion of solar energy into chemical energy.1 Therefore, it seems important to investigate the processes such as interfacial electron transfer and electron-hole recombination occurring at illuminated semiconductor colloidal particles. For that purpose, time-resolved laser spectroscopy for transparent colloidal semiconductor solution is very useful.1 2 Serpone and co-workers3 first reported picosecond absorption spectra of reduced methylvlologen (MV*+) on illuminated colloidal CdS and claimed that the photoinduced electron transfer from CdS to methylviologen (MV2+) occurred at the rate of 109 s™1. Rossetti and Brus4 reported that the rise time of MV’+ radical is between 5 ns and 20 ps from a picosecond resonance Raman scattering study. Recently, Ramsden5 6has reported that MV2+ is not adsorbed on colloidal CdS stabilized with sodium hexametaphosphate (HMP) from the analysis of nanosecond laser flash photolysis.
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Picosecond Absorption Spectra of a Reaction Center from a Novel Thermophilic Photosynthetic Bacterium 'Chromatium tepidum' 査読あり
Nozawa, Hatano, Terauchi, Kobayashi, Trost, Blankenship
Proceedings of 1988 International Conference on Ultrafast Phenomena 172 - 173 1988年8月
共著
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Mamoru Terauchi, Takayoshi Kobayashi
Chemical Physics Letters 137 319 - 323 1987年10月
共著
担当区分：筆頭著者
励起状態で非常に大きな双極子能率を有すると考えられる1-[p-(N,N-Dimethylamino)phenyl]-4-(p-Nitrophenyl)-1,3-Butadieneの第一励起状態での双極子能率を測定し、そのナノ秒窒素レーザー励起によるレーザー発振特性を、ピコ秒YAGレーザー励起による過渡吸収分光測定結果と併せて考察。
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Takayoshi Kobayashi, Hiroyuki Ohtani, Kenji Kurokawa, Mamoru Terauchi
Proceedings of 1987 International Quantum Electronics Conference 114 - 115 1987年10月
共著
Stilbene derivatives with electron-donative group(s) attached to one benzene ring and electron-acceptive group(s) to the other are interesting molecules with respect to their large nonlinear optical properties associated with their giant permanent dipole moments, especially in the excited singlet states. One such molecule is 4-dimethyla- mino-4'-nitrostilbene (DMANS), which is reported to have a very large dipole moment (32 D) in the lowest excited singlet state.1 We have proposed the possibility of the application of such molecular systems as DMANS and its diethyl derivative, 4-diethylamino-4'-nitrostilbene (DEANS), which has higher solubility than DMANS in various solvents, to the optically bistable devices utilizing their large third-order nonlinear susceptibility induced by the large dipole moments.2,3
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Lasing Properties and Gain Spectrum of 4-Diethylamino-4'-Nitrostilbene with a Giant Permanent Dipole 査読あり
Takayoshi Kobayashi, Mamoru Terauchi, Hisao Uchiki
Chemical Physics Letters 126 143 - 148 1986年10月
共著
大きな双極子能率を有する電荷移動錯体4-Diethylamino-4'-Nitrostilbeneのベンゼン溶液がナノ秒窒素レーザー励起によってレーザー発振することを初めて見いだし、そのレーザー発振スペクトルを測定。